Prof. Cristina Silvano

Short Bio

Cristina Silvano is a Full Professor at the Dept. of Electronics, Information and Bioengineering, Politecnico di Milano, Italy, where she led the research area on Computer Science and Engineering. She received the M.Sc. degree in Electronics Engineering from Politecnico di Milano in 1987, then she started her career as Senior Design Engineer at the R&D Labs of Group Bull, Italy. In 1992-1995 she participated in the Bull-IBM original design team of the first worldwide multiprocessor chip set based on the IBM PowerPC processor, commercialized in Bull Escala and IBM RS/6000 servers. In 1996, she started her academic career as Ph.D. student at the University of Brescia (Italy). After the PhD in 1999, she was post-doc at Politecnico di Milano (1999), Assistant Professor at the University of Milano (2000-2002) and Associate Professor at the Politecnico di Milano (2002-2017). From 2008 to 2018, she has been Scientific Coordinator of three European research projects: FET-HPC-ANTAREX, FP7-2PARMA and FP7-MULTICUBE. In 2022, she was promoter of the M.Sc. degree in High Performance Computing Engineering at Politecnico di Milano, first of this kind in Italy. Her main research interests are in the areas of computer architecture, high performance computing and electronic design automation, with focus on design space exploration, heterogeneous architectures, energy-efficient AI accelerators and compiler autotuning. She has published about 200 peer-reviewed publications and holds some international patents owned by Group Bull and STMicroelectronics. She is an IEEE Fellow (Class 2017) for her contributions to energy-efficient computer architectures. She is an active member of the scientific community on computer architectures and EDA serving regularly in several IEEE/ACM international program committees. She is currently Editor-in-Chief of the ACM Trans. on Architecture and Code Optimization. She was also Topical Associate Editor of the IEEE Trans. on Computers, Associate Editor of IEEE Computer Architecture Letters and Associate Editor-in-Chief of the Elsevier Journal on Parallel and Distributed Computing. She also served in the Selection Committee of the IEEE Fellowship, the IEEE CS Charles Babbage Award, the IEEE CS Eckert Mauchly Award, and the IEEE TCCA Young Computer Architect Award. She has been an independent expert reviewer for the European Commission and for several National Science Foundations.